Power Electronics Europe Issue 4 - November 2022

ww.wolfspeed.com SILICON CARBIDE 11 www.power-mag.com Issue 4 2022 Power Electronics Europe wafers from prototype to production. The new Mohawk Valley Factory fabrication facility is shown above. Upping the performance ante Among key performance parameters that help meet EV requirements are the SiC MOSFET drain-to-source ON resistance, RDS(ON), and rated junction temperature, T j , with the former responsible for conduction losses and thermal waste and the latter the device reliability and its ability to withstand heat. Wolfspeed has continued innovation to address these concerns with a new Gen 3+ 750 V bare-die MOSFET (Figure 3) that has already won several contracts. Coming device boasts low on-state resistance (R DS(ON) ) and high maximum junction temperature (T J ). Gen 3+ 750 V Characteristics Compared with Wolfspeed’s 650 V, 15 m Ω MOSFET die with T j rated to 175°C, the Gen 3+ product improves on R DS(ON) per unit area as well as total area to reach 10 m . The 750 V rating improves the FIT rate and the MOSFET also elevates the T j rating to above 175°C (200°C data shown) for peak condition operation during the vehicle mission profile. The temperature-stable R DS(ON) increases overall efficiency as well as system temperature limits (Figure 4). Gen 3+ technology offers similar stability for the gate threshold voltage, V th , giving designers enough headroom to switch aggressively while avoiding spurious turn-on (Figure 5). Combined with a high capacitance ratio, the stable V th allows for safe operation without shoot-through concerns at elevated temperatures. Moreover, Wolfspeed uses an Ni/Pd/Au metallization stack-up on both die sides to allow double-sided soldering/sintering. This new metallization used on Wolfspeed’s automotive die opens the option for more advanced packaging solutions that can lead to better performance from the die and better reliability of the package. Examples of this include sintering copper clips or films to the top of the die and using copper wire bonds for higher current Figure 2: Wolfspeed is leading the industry in taking 200-mm Silicon Carbide wafers from prototype to production. The new Mohawk Valley Factory fabrication facility is shown above. Figure 4: The Gen 3+ 750 V MOSFET R DS(ON) (blue) remains low and stable over 25ºC-to 200ºC range against the competition. Figure 3: The Gen 3+ 750 V MOSFET sets new standards for low R (DSON) and temperature qualification. in a 5mm x 5mm-layout and 180- m thickness, it features low internal gate resistance R g to optimize current rise-time and switching losses. Importantly, the new

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